The present invention relates to a thin circuit block and method of producing the thin circuit block, a thin wiring circuit device formed from the circuit blocks to have a thin, multilayer structure and method of producing the wiring circuit device, and a semiconductor device formed from the circuit block to have a thin, multilayer structure and method of producing the semiconductor device.
Recently, various electronic apparatuses are designed to be more compact and lightweight and have advanced or multiple functions. Also, a wiring circuit devices or semiconductor device, used in such electronic apparatuses, is designed to be smaller and more multilayer. The smaller, more multilayer structure of the wiring circuit device has been implemented by minimizing the via size and wiring pitch in a wiring circuit as well as by the technological developments such as smaller and multi-pin IC package, bare-chip mounting of semiconductor chips, minimization and surface mounting of passive components such as a capacitor, resistor, etc. With such a smaller structure of the wiring circuit device, however, it has become extremely difficult to produce and mount passive components on a circuit board in the wiring circuit device by such conventional techniques. Therefore, there has also been proposed a wiring circuit device having embedded therein components deposited directly on the principal surface, or in a layer, of a circuit board.
In the above wiring circuit device, the directly deposited components such as a resistor and capacitor are formed on a ceramic substrate by a thick film method in which pastes of metal and insulating material are printed by the screen printing, for example. However, the thick film method cannot implement any accurate pattern and thickness of the passive components and also it is not highly reliable upon because of its unstable repeatability etc. Also, since in the process of forming the passive components by the thick film method, pastes applied to a substrate are heated at a high temperature for sintering, so the substrate should have a high thermal resistance. Namely, the substrate can only be formed from limited kinds of material, which will lead to relatively high production costs.
On the other hand, the semiconductor device uses a so-called system large-scale integrated circuit (LSI) having predetermined functions integrated in one semiconductor chip. Also, with the evolution of the processing technique, a system LSI having integrated therein a mixture of different functions such as logical and memory functions or analog and digital functions, for example, has been provided for use as such a semiconductor device. Further, to meet the demands for the semiconductor device having a smaller, thinner structure, it has been proposed to attain such a reduced thickness by polishing a semiconductor yet in the state of a wafer, for example, at the back thereof by a mechanical or chemical method or by both.
Since the system LSI has a plurality of functional blocks formed therein through a plurality of processes corresponding to the functional blocks, so the number of processes will be larger, resulting in an increased time of production and a lower yield, which adds to production costs. To solve the problems of such a system LSI, it has also been proposed to adopt a multi-chip module (MCM), for example, in lieu of the system LSI. The MCM is a semiconductor module formed by producing the above functional blocks as individual semiconductor chips in their respective processes and mounting the semiconductor chips together on the same wiring board, and which has similar functions to those of the system LSI.
To solve the aforementioned problems of the wiring circuit device, it has been proposed to provide a wiring circuit device having components embedded therein by any one of the thin film methods such as photolithography, sputtering, evaporation and the like as shown in FIGS. 29 and 30. FIG. 29 shows a wiring circuit device 100 having an insulating layer 102 formed on the principal surface of a core substrate 101, and a wiring pattern 103 and resistor 104 deposited on the insulating layer 102. The resistor 104 is formed from nickel-chrome (Nixe2x80x94Cr), tantalum nitride (TaN) or tantalum (Ta) for example. It should be noted that the tantalum nitride is preferably usable to form the resistor 104 because its temperature coefficient (TCR) is as small as below 100 ppm/xc2x0 C. and life is stably long.
FIG. 30 shows another wiring circuit device 105 including the core layer 101 having the insulating layer 102 formed on the principal surface thereof and the wiring pattern 103 formed on the insulating layer 102, as in the aforementioned wiring circuit device 100. The wiring circuit board 105 further includes a capacitor 106 deposited between end portions 103a and 103b of the wiring pattern 103. More specifically, the capacitor 106 includes the lower wiring pattern 103a (end portion of the wiring pattern 103), a dielectric layer 107 deposited on the lower wiring pattern 103a, and the upper wiring pattern 103b (end portion of the wiring pattern 103) stacked on the dielectric layer 107. The dielectric layer 107 is formed from tantalum oxide (Ta2O5), silicon nitride (Si3N4), barium titanate (BaTiO) or the like. Tantalum oxide can be deposited directly on the substrate by sputtering. A tantalum oxide layer having a desired thickness can be formed by anodic oxidation of the tantalum layer and tantalum nitride layer and making the oxide grow on the surface of the substrate.
The core substrate of the wiring circuit device is formed from a conductive silicon substrate which will function when a passive component is formed on the substrate. To connect, by the wire bonding technique, multiple lands formed on the wiring pattern to lands, respectively, on a mother substrate when mounting the wiring circuit device on a mother substrate, a terminal pattern is formed on the surface of a layer in which a passive component is to be formed. Therefore, the wiring circuit device has to undergo processes of the terminal pattern forming and wire bonding.
A communication terminal unit or the like should essentially be compact and lightweight for portability, and so it includes a radio frequency (RF) module provided in a transmission/reception unit thereof to convert analog RF signals. FIG. 31 illustrates an example of the RF module. The RF module is generally indicated with a reference 110. As shown, the RF module 110 includes a base circuit board 111, and an RF device layer 112 stacked on the base circuit board 111 and in which passive components are formed by deposition by the thin film and thick film methods. The RF device layer 112 has a first wiring layer 115 formed on a wiring pattern 113 on the base circuit board 111 with an insulating layer 114 provided between the wiring pattern 113 and the layer 115. In the RF device layer 112, the wiring pattern 113 on the base circuit board 111 is connected to the first wiring layer 115 by a via 116 formed in the insulating layer 114.
The passive components formed in the RF device layer 112 include a resistor 117 and capacitor 118 deposited on the first wiring layer 115. Further, the RF device layer 112 includes a second insulating layer 119 formed on the first wiring layer 115, and a second wiring layer 120 stacked on the second insulating layer 119 with a via 116 being formed in the latter. In the RF device layer 112, the second wiring layer 120 has an inductor 121 formed thereon. It should be noted that the inductor 121 is generally formed not by any thin film method such as sputtering because of a gain loss, but by a thick film method such as plating for example.
Since in such an RF transmission/reception module (will be referred to as xe2x80x9cRF modulexe2x80x9d hereunder) 110, the resistor 117 and capacitor 118 are formed with a high precision on the base circuit board 111 by the thin film method such as sputtering, so the base circuit board 111 is required to be highly resistant against an elevated surface temperature during sputtering, and able to well keep a focal depth during lithography and also a contact alignment during masking. To this end, the base circuit board 111 is also required to be high-precision planarized and have a high performance of insulation and a high thermal or chemical resistance.
In the RF module 110, the core substrate of the base circuit board 111 is formed from silicon (Si) or glass having the above characteristics, and so low-loss passive components can be deposited on the core substrate at lower costs independently of the LSI producing process. Use of the Si or glass substrate to form the core substrate in the RF module 110 permits to form the passive components with a higher precision and make the areas of such components about 100 times smaller than by the patterning by printing used in the conventional ceramic module processing or by the wet etching used to form a wiring pattern on a printed wiring board. Also, use of the Si or glass substrate as the core substrate in the RF module 110 permits the deposited passive components to operate with a frequency of up to 20 GHz.
For the above RF module 110, however, it is necessary to form lands on the RF device layer 112 and connect them by the wire bonding technique or the like as having been described above in order to mount the RF module 110 on a mother substrate, for example. Namely, in the RF module 110, power and ground lines or control signal lines from the base circuit board 111 are connected to the RF device layer 112 in which an RF signal wiring pattern is formed. Thus in the RF module 110, an electromagnetic interference will take place between the base circuit board 111 and RF device layer 112, and multiple wiring layers are to be formed, which will lead to larger production costs.
For forming an RF module, an organic wiring board generally used in conventional wiring board devices and which are relative inexpensive and can be multilayered is used to solve the problems caused by the aforementioned silicon or glass substrate. In the RF module thus formed from the organic wiring board, power and ground lines and control signal lines are formed on the base circuit board and an RF signal circuit is formed in the RF device layer, to thereby separate the base circuit board and RF device layer from each other. Thus, it is possible to inhibit the electromagnetic interference from taking place and thus improve the characteristics of the RF module. Since power and ground lines having sufficient area can be formed on the base circuit board, a power can be supplied to the RF module with a high regulation.
However, the RF module is disadvantageous in that in case the RF device layer is formed on a multilayer wiring board as a base circuit board, no high-precision deposited passive components can be formed because the base circuit board does not show any sufficient characteristics of the aforementioned silicon or glass substrate. Also, since the multilayer wiring board itself shows a warping, so the precision of aligning a wring pattern of each layer with a one of the other layer becomes lower in a sequence of patterning processes, so that the RF module cannot be produced with a high precision. Further, the RF module is disadvantageous in that since the multilayer wiring board has a relatively hard surface which is rather irregular due to the wiring pattern formed therein, so it is difficult to form high-precision deposited passive components having to be planar. Moreover, it is difficult to subject the RF module to sputtering because the multilayer wiring board is no sufficient thermal resistance.
FIG. 32 shows a semiconductor device. The semiconductor device is generally indicated with a reference 130. As shown, the semiconductor device 130 includes a wiring board 131 formed from an organic or ceramic substrate, and wiring layers 134 and 135 formed by patterning on the front and rear principal surfaces of the wiring board 131 with insulating layers 132 and 133 being provided under the wiring layer 134 and on the wiring layer 135, respectively. In this semiconductor device 130, appropriate wiring patterns and deposited components (as necessary) (not shown) are formed in the wiring layers 134 and 135 one of which has semiconductor chips 136 mounted with their face down on one of the principal surfaces thereof. In the semiconductor device 130, the front and rear wiring layers 134 and 135 are connected to each other via through-holes 137 formed in the wiring board 131. In the semiconductor device 130, solder resist layers 138 and 139 are formed over the wiring layer 134 and below the wiring layer 135, respectively, and connecting terminals 142 and external-connection electrodes 143 are formed and connected to the wiring layers 134 and 135 by via-holes 140 and 141, respectively.
Since in the semiconductor device 130, wiring paths are formed on the principal surface of the wiring board 131 at a pitch of about 100 xcexcm at minimum, so the wiring board 131 should have a wide area or be multilayered in case many connections are to be made between the semiconductor chips 136. Also, in the semiconductor device 130, the semiconductor chips 136 or wiring patterns are connected to each other via the through-holes 137 in case the semiconductor chips 136 are mounted on each of the front and rear principal surfaces of the wiring board 131. In the semiconductor device 130, the wiring board 131 should have a large area because the through-holes 137 and lands have a diameter of at least about 50 xcexcm.
In the semiconductor device 130, because of the aforementioned problems caused by the wiring board 131, the wiring path connecting the semiconductor chips 136 to each other will be longer and the wiring pass will include a larger number of vias 140 and 141 as more wiring layers are formed. Therefore, the semiconductor device 130 will have larger components L, C and R of the wiring path and its performance will be lower than that of a system LSI.
Also, in the semiconductor device 130, no semiconductor chips and other electronic parts can be mounted on the back of the wiring board 131 because there are formed there the external-connection terminals 143 as mentioned above for use to mount the semiconductor device 130 on a mother substrate. Thus the semiconductor device 130 is disadvantageous in that the semiconductor chip 136 cannot well be related with its peripheral circuits and components cannot be mounted to the wiring board 131 with a high density.
On the other hand, the semiconductor chip 136 formed from a wafer having been polished for a reduced thickness may be mounted on the wiring board 131 in the semiconductor device 130. However, such a thin semiconductor chip 136 has no sufficient mechanical strength, so it is not easy to handle after the polishing process. For example, the wafer may possibly be broken during transportation to a next process or cracked in the dicing process. Also, the thin semiconductor chip 136 will possibly be chipped or cracked while it is being mounted on the wiring board 131.
The aforementioned use of the silicon or glass substrate excellent in flatness and thermal resistance as mentioned above is intended to attain an improved reliability of the wiring layers in the semiconductor device 130. However, since it is difficult to form conductive structures on both the front and back sides of the semiconductor device 130, a higher packaging density cannot easily be attained by mounting semiconductor chips on both the sides of the semiconductor device 130. Also, in the semiconductor device 130, the wiring board 131 is likely to warp due to a difference in wiring density from one wiring layer to another. Especially, heat caused in the process of mounting the semiconductor chips 136 will further increase the warping of the wiring board 131, if formed from an organic substrate, so that poor soldering may possibly result during mounting of the semiconductor device 130 on a mother substrate for example, which will cause the reliability of the wiring layers to be lower.
Accordingly, the present invention has an object to overcome the above-mentioned drawbacks of the related art by providing a thin circuit block formed by selecting a silicon or glass substrate having a sufficient flatness and less warping as a mother substrate, subjecting the mother substrate to thin and thick film deposition processes, forming, on the mother substrate, wiring layers having embedded deposited components therein on contact with insulating layers, respectively, and then separating the thus formed circuit block from the mother substrate, the circuit block being a high-precision, high-functional and highly reliable one intended for use to provide a compact and inexpensive package, and method of producing the circuit block, a wiring circuit device including the circuit block and method of producing the wiring circuit device, and a semiconductor device including the circuit block and method of producing the semiconductor device.
The above object can be attained by providing a sheet-like circuit block including according to the present invention:
a patterned insulating layer;
a wiring layer formed inside the patterned insulating layer; and
a plurality of external-connecting lands formed on the wiring layer;
the circuit block thus constructed being formed on a release layer formed on a planarized principal surface of a mother substrate and at which it is separated from the mother substrate.
Since the circuit block according to the present invention is produced on a mother substrate having a high-precision planarized surface and an excellent thermal resistance and chemical resistance, capable of well keeping a focal depth during lithography and showing a good contact alignment during masking, so the wiring layer thus formed in the circuit block can include fine wiring passes and so high a precision and reliability as permitting to embed high-precision deposited components therein and mount semiconductor chips, electronic parts, etc., with a high density without being influenced by any warping and surface irregularities of the substrate. This circuit block is bonded to a base circuit board or the like to provide a highly reliable wiring circuit device.
Also, the above object can be attained by providing a circuit block producing method including, according to the present invention, steps of:
forming a release layer on a planarized principal surface of a mother substrate;
forming an insulating layer on the release layer;
patterning, on the insulating layer, a wiring layer having a plurality of external-connection lands; and
separating, from the release layer on the mother substrate, a thin circuit block consisting of the insulating layer and wiring layer.
In the above method according to the present invention, the circuit block is produced on a mother substrate having a high-precision planarized surface and an excellent thermal resistance and chemical resistance, capable of well keeping a focal depth during lithography and showing a good contact alignment during masking. So, the circuit block can efficiently be produced to include the wiring layer having fine wiring passes and so high a precision and reliability as permitting to embed high-precision deposited components therein and mount semiconductor chips, electronic parts, etc. with a high density, without being influenced by any warping and surface irregularities of the substrate.
Also, the above object can be attained by providing a wiring circuit device including according to the present invention:
a circuit block; and
a base circuit board having a plurality of connection lands formed on a principal surface thereon correspondingly to external-connection lands formed on the circuit block;
the circuit block being shaped as a sheet including:
an insulating layer;
a wiring layer patterned on the insulating layer; and
the plurality of external-connection lands formed on the wiring layer;
the circuit block being formed on a release layer formed on a planarized principal surface of a mother substrate;
the circuit block being separated from the release layer on the mother substrate; and
the circuit block being bonded to the principal surface of the base circuit board with the external-connection lands formed on the wiring layer being connected to the corresponding connection lands formed on the base circuit board.
The above wiring circuit device includes the circuit block produced on a mother substrate having a high-precision planarized surface and an excellent thermal resistance and chemical resistance, capable of well keeping a focal depth during lithography and showing a good contact alignment during masking, and which includes the wiring layer having fine wiring passes and so high a precision and reliability as permitting to embed high-precision deposited components therein and mount semiconductor chips, electronic parts, etc. with a high density, without being influenced by any warping and surface irregularities of the substrate. Since the wiring layer and circuit of the base circuit board are isolated from each other electrically and electromagnetically to prevent any mutual interference from taking place, so it has improved characteristics. Also, since power and ground lines having sufficient areas can be formed on the base circuit board, a power can be supplied to the wiring circuit device with a high regulation.
Also, the above object can be attained by providing a method of producing a wiring circuit device, including, according to the present invention, steps of:
forming a circuit block on a mother substrate; and
mounting, by bonding, the circuit block on a principal surface of a base circuit board;
the circuit block forming step further including steps of:
forming a release layer on a planarized principal surface of a mother substrate;
forming an insulating layer on the release layer;
patterning, on the insulating layer, a wiring layer with a plurality of external-connection lands; and
separating, from the release layer on the mother substrate, a thin circuit block consisting of the insulating layer and wiring layer.
In the above wiring circuit device producing method, the circuit block is produced on a mother substrate having a high-precision planarized surface and an excellent thermal resistance and chemical resistance, capable of well keeping a focal depth during lithography and showing a good contact alignment during masking, and mounted, by bonding, on a base circuit board. The wiring circuit device thus produced includes a wiring layer having fine wiring passes and so high a precision and reliability as permitting to embed high-precision deposited components therein and mount semiconductor chips, electronic parts, etc. with a high density, without being influenced by any warping and surface irregularities of the substrate. Since the wiring layer and circuit of the base circuit board are isolated from each other electrically and electromagnetically to prevent any mutual interference from taking place, so it has improved characteristics. Also, since power and ground lines having sufficient areas can be formed on the base circuit board, a power can be supplied to the wiring circuit device with a high regulation.
Also, the above object can be attained by providing a semiconductor device including according to the present invention:
a circuit block shaped in the form of a sheet;
semiconductor chips mounted on a wiring layer of the circuit block and a sealing resin layer which seals the semiconductor chips; and
a base circuit board having formed on a principal surface thereof a plurality of connection lands corresponding to external-connection lands of the circuit block;
the circuit block including:
an insulating layer;
a wiring layer patterned on the insulating layer; and
the plurality of external-connection lands formed on the wiring layer.
The above semiconductor device includes the circuit block produced on a mother substrate having a high-precision planarized surface and an excellent thermal resistance and chemical resistance, capable of well keeping a focal depth during lithography and showing a good contact alignment during masking, and which has fine wiring passes. Thus, semiconductor chips can be mounted on the semiconductor device with a high precision without being influenced by any warping and surface irregularities of the base circuit board. Since the wiring layer and circuit of the base circuit board are isolated from each other electrically and electromagnetically to prevent any mutual interference from taking place, so it has improved characteristics. Also, since power and ground lines having sufficient areas can be formed on the base circuit board, a power can be supplied to the semiconductor device with a high regulation. In this semiconductor device, the semiconductor chips and sealing resin layer are reduced in thickness by polishing and incurs less fracture, crack or the like.
Also, the above object can be attained by providing a semiconductor device producing method including, according to the present invention, steps of:
forming a thin circuit block on a mother substrate;
mounting semiconductor chips on the circuit block;
forming, on a wiring layer of the circuit block, a sealing resin layer which seals the semiconductor chips;
separating the circuit block having the semiconductor chips mounted thereon from a release layer formed on the mother substrate; and
mounting, by bonding, the circuit block on a principal surface of a base circuit board; and
the circuit block forming step including steps of:
forming the release layer on a planarized principal surface of the mother substrate;
forming an insulating layer on the release layer; and
patterning, on the insulating layer, the wiring layer having a plurality of external-connection lands.
In the above semiconductor device producing method, the circuit block is produced on the mother substrate having a high-precision planarized surface and an excellent thermal resistance and chemical resistance, capable of well keeping a focal depth during lithography and showing a good contact alignment during masking, and mounted, by bonding, on the base circuit board. Thus, the semiconductor device can efficiently be produced and it is highly reliable since it has formed therein fine wiring passes not affectable by warping and surface irregularities of the base circuit board and can have semiconductor chips mounted thereon with a high precision. Since the wiring layer and circuit of the base circuit board are isolated from each other electrically and electromagnetically to prevent any mutual interference from taking place, so it has improved characteristics. Also, since power and ground lines having sufficient areas can be formed on the base circuit board, a power can be supplied to the semiconductor device with a high regulation. In this semiconductor device, the semiconductor chips and sealing resin layer are reduced in thickness by polishing and incurs less fracture, crack or the like.
These objects and other objects, features and advantages of the present invention will become more apparent from the following detailed description of the best mode for carrying out the present invention when taken in conjunction with the accompanying drawings.